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Controllers: Chip Level: PCD2112

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Tech Spec
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Technical Specification

    English/Imperial
Acceleration rate setting range 1 to 65,535 (16 bit)  
CPU interface SPI (Serial Peripheral Interface)  
Deceleration rate setting range 1 to 65,535 (16 bit)  
Max. Output frequency   2.4M pps
No. of axes 1  
No. of positioning pulse setting range 0 to 268,435,455 (28 bit) or -134,217,728 to +134,217,727  
No. of speed setting registers 3 (FL, FH1, FH2)  
No. of steps to set/change the speed 1 to 8,191 (13 bit)  
Package type 48-pin QFP  
Power supply voltage +3.3V ±10%  
Ramping down point setting range 0 to 16,777,215 (24 bit)  
RoHS Compliant Yes  
S-curve Yes  
Speed multiplication rate range 0.5x to 300x  
Standard Reference Clock 9.8304 MHz  

Manuals & Documents




System Drawing